Simplified Method to Analyze Drive Strengths for GaN Power Devices

Abstract

GaN power switches enable ultra-fast switching speeds, yet, the maximum gate drive strength is mainly limited by the voltage overshoot across drain-source junction. There is a complex relationship between the power loop inductance, gate resistance, load current, parasitic capacitances of the GaN FET and the resultant voltage ringing. In this paper, a simplified method to relate the gate drive strength with the voltage overshoot is presented. With this approach, it is possible to find a maximum achievable dV/dt for different GaN FETs as well as various board and package parasitics under different operating conditions, which helps designers to identify and compare I-V overlap losses of various GaN FETs without running SPICE models.