dc.contributor.author | Erenoğlu, Ayşe Kübra | |
dc.contributor.author | Tatar, Güner | |
dc.date.accessioned | 2023-08-04T11:22:34Z | |
dc.date.available | 2023-08-04T11:22:34Z | |
dc.date.issued | 2023 | en_US |
dc.identifier.citation | ERENOĞLU, Ayşe Kübra & Güner TATAR. "Real-Time Hardware Acceleration of Low Precision Quantized Custom Neural Network Model on ZYNQ SoC". 5th International Congress on Human-Computer Interaction, Optimization and Robotic Applications, HORA 2023, (2023): 1-6. | en_US |
dc.identifier.uri | https://hdl.handle.net/11352/4631 | |
dc.description.abstract | Achieving a lower memory footprint and reduced
computational density in neural network models requires the use
of low-precision models. However, existing techniques typically
rely on floating-point arithmetic to preserve accuracy, which can
be problematic for convolutional neural network models (CNNs)
with substantial memory requirements when using floating-point
numbers. Additionally, larger bit widths lead to higher computational
density in hardware architectures. This has resulted in
the need for current models to become deeper network models
with sometimes billions, of parameters to address contemporary
problems, thereby increasing computational complexity and causing
memory allocation issues. These challenges render existing
hardware accelerators insufficient. In scenarios where hardware
complexity can be traded-off for accuracy, the adoption of
model quantization enables the utilization of limited hardware
resources for implementing neural networks. From a hardware
design standpoint, employing quantized models offers notable
advantages in terms of speed, memory utilization, and power
consumption compared to traditional floating-point arithmetic.
To this end, we propose a method for detecting network intrusions
by quantizing weight and activation functions using the Brevitas
library in a custom multi-layer detector. We conducted real-time
experimentation of the technique on the ZYNQ System-on-Chip
(SoC) using the FINN framework, which enabled deep neural
network extraction within Field Programmable Gate Arrays
(FPGAs), resulting in an accuracy rate of approximately 92%.
We selected the UNSW-NB15 dataset, which was generated by the
Australian Cyber Security Center (ACCS), for the investigation. | en_US |
dc.language.iso | eng | en_US |
dc.publisher | IEEE | en_US |
dc.relation.isversionof | 10.1109/HORA58378.2023.10155783 | en_US |
dc.rights | info:eu-repo/semantics/embargoedAccess | en_US |
dc.subject | FINN Experimental framework | en_US |
dc.subject | Quantization aware training | en_US |
dc.subject | System on chip field programmable gate arrays | en_US |
dc.subject | Low precision arithmetic | en_US |
dc.title | Real-Time Hardware Acceleration of Low Precision Quantized Custom Neural Network Model on ZYNQ SoC | en_US |
dc.type | conferenceObject | en_US |
dc.relation.journal | 5th International Congress on Human-Computer Interaction, Optimization and Robotic Applications, HORA 2023 | en_US |
dc.contributor.department | FSM Vakıf Üniversitesi, Mühendislik Fakültesi, Elektrik-Elektronik Mühendisliği Bölümü | en_US |
dc.contributor.authorID | https://orcid.org/0000-0002-9578-6194 | en_US |
dc.contributor.authorID | https://orcid.org/0000-0002-3664-1366 | en_US |
dc.identifier.startpage | 1 | en_US |
dc.identifier.endpage | 6 | en_US |
dc.relation.publicationcategory | Konferans Öğesi - Uluslararası - Kurum Öğretim Elemanı | en_US |
dc.contributor.institutionauthor | Erenoğlu, Ayşe Kübra | |
dc.contributor.institutionauthor | Tatar, Güner | |